1. Field of the Invention
The present invention relates to a semiconductor integrated circuit apparatus (LSI) in which a memory macro function block and peripheral circuit are disposed on the same semiconductor chip in a mixed manner, particularly to a circuit which facilitates the changing of the memory macro function block and which is used for LSI for a specific application, and the like.
2. Description of the Related Art
A logic LSI and memory LSI were separately used conventionally, but, in recent years, owing to progress in semiconductor processing techniques both LSIs have been formed into one chip, producing a memory mixed logic LSI. In this case, there is a dynamic random access memory (DRAM) mixed/loaded LSI in which a memory macro function block is mixed and loaded on the same chip as a logic circuit portion, analog circuit portion, and input/output circuit portion.
The memory macro function block includes a memory core function block, a test circuit for testing a function of the memory core function block, a command decoder which decodes commands sent from the outside of the macro function block (e.g. the user logic side), an address decoder, and a memory core input/output circuit.
In the conventional DRAM mixed LSI, the whole memory macro function block has been handled as one block. Moreover, a design is changed to such an extent that the configuration is a little changed. For example, when a bit capacity of the memory is changed, a memory wiring layer is re-connected.
However, when the function of the memory macro function block is changed to a static random access memory (SRAM) from a synchronous dynamic random access memory (SDRAM), the design has to be largely altered. For example, the whole memory macro function block is re-designed.
Moreover, the inside of the memory macro function block is divided into two. For example, the length of a word line in the memory macro function block is halved so as to raise the speed. When a dimensional change is required in this manner, not only the memory core function block but also the whole memory macro function block has to be redesigned.
Therefore, there has been a demand for realization of a semiconductor integrated circuit in which a memory macro function block is loaded in a mixed manner and which can easily be adapted for the changes of a command configuration, address configuration, input/output configuration, and the like without any design change.